Various implementations are known for effecting "hot-swapping" or "hot-plugging," i.e. live insertion and removal, of electronic sub-assemblies. The typical, primary concern in such implementations is to insert an electronic sub-assembly into or remove an electronic sub-assembly from an electronic assembly having power applied thereto, without causing any damage to electronic components on the sub-assembly or in the electronic assembly.
Typical approaches involve mechanical implementations, such as switches or varying length interconnect pins as described in U.S. Pat. Nos. 5,664,119 and 5,317,697, respectively. The switches or variable length pins are implemented in a manner that effects controlled ramp-up/ramp-down of the sub-assembly, and avoids adverse affects on ongoing system operations. Such mechanical implementations add significant additional cost in the form of additional hardware and specialized hardware configurations. They also add complexity to the system design.
In various high reliability/maintainability, or fault tolerant electronic hardware systems, the system includes circuit boards having mixed voltage logic parts or devices, for example some 5 Volt and some 3.3 Volt parts. In such systems the circuit boards must be capable of being hot-plugged into an operating backplane. Typically, the 5V and 3.3V parts run from separate 5V and 3.3V supplies, and the backplane and all backplane interface logic is 5V-only. Thus 3.3V logic devices connect to the 5V interface logic.
In conventional logic devices used in such mixed voltage systems, the input pins of the 3.3V devices are 5 Volt tolerant, in that voltage limiting circuits have been added to 3.3V input buffer structures by the manufacturers to offer an interface capability compatible with 5V logic levels. Typical 5V compatible input buffers are designed to accept valid 5V TTL or CMOS input levels, along with normal transient levels, at the device input limited input pins.
This input voltage limiting alone, is effective for steady-state conditions, but special concerns exist during hot-plugging. During insertion of the board into a hot (live 5-Volt) backplane, the 5V and 3.3V power levels in general ramp up at different rates. That is, the nominal times that it takes for the respective 5V and 3.3V power levels to be established are different. The ramp up difference is exacerbated if the 3.3V supply is generated on-board, derived from the 5V supply by means of a DC-DC converter or voltage regulator. The potential for undesirable adverse affects on ongoing system operations is particularly pronounced if the 3.3V supply fails while the 5V supply continues to operate.
CMOS components, such as ASIC devices, are subject to stress if their inputs are driven to a level greater than 3.3V before the supply voltage has reached a nominal voltage level, i.e. 3.0V. Gate oxide breakdown or deterioration, and/or junction breakdown may occur in such devices as voltage levels at the inputs rise while supply voltage levels remain below nominal levels. Similarly, latch-up conditions can occur under such circumstances. A more serious condition exists if the 3.3V supply fails while the 5V supply continues to operate. In such a case, device inputs are subjected to prolonged exposure to high voltages during the adverse power condition and permanent destruction of the device can result.